68_a_lob_j01
In the above design the two electrodes are completely separated from one another so that this major source of trouble should not be present.
%3
r_0068_0002__the_r_0068_0004__design
the design
r_0068_0003__above
above
r_0068_0002__the_r_0068_0004__design->r_0068_0003__above
[qual]
r_0068_0008__are
are
r_0068_0008__are->r_0068_0002__the_r_0068_0004__design
In [nim]
r_0068_0010__separated
separated
r_0068_0008__are->r_0068_0010__separated
[scope]
r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes
the two electrodes
r_0068_0010__separated->r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes
[arg1]
r_0068_0009__completely
completely
r_0068_0010__separated->r_0068_0009__completely
[nim]
r_0068_0012__one_r_0068_0013__another
one another
r_0068_0010__separated->r_0068_0012__one_r_0068_0013__another
from [nim]
z_000_68_a_lob_j01_23
r_0068_0010__separated->z_000_68_a_lob_j01_23
[arg0]
r_0068_0014__so_that
so that
r_0068_0014__so_that->r_0068_0008__are
[scope]
r_0068_0020__should_r_0068_0021__not
should not
r_0068_0014__so_that->r_0068_0020__should_r_0068_0021__not
[restriction]
r_0068_0022__be
be
r_0068_0020__should_r_0068_0021__not->r_0068_0022__be
[scope]
r_0068_0015__this_r_0068_0017__source
this source
r_0068_0016__major
major
r_0068_0015__this_r_0068_0017__source->r_0068_0016__major
[attrib]
r_0068_0019__trouble
trouble
r_0068_0015__this_r_0068_0017__source->r_0068_0019__trouble
of
r_0068_0022__be->r_0068_0015__this_r_0068_0017__source
[arg0]
r_0068_0023__present
present
r_0068_0022__be->r_0068_0023__present
[prd]
arc(r_0068_0002__the_r_0068_0004__design, r_0068_0003__above, qual8).
arc(r_0068_0008__are, r_0068_0002__the_r_0068_0004__design, r_0068_0001__In_nim5).
arc(r_0068_0008__are, r_0068_0010__separated, scope).
arc(r_0068_0010__separated, r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes, arg1).
arc(r_0068_0010__separated, r_0068_0009__completely, nim25).
arc(r_0068_0010__separated, r_0068_0012__one_r_0068_0013__another, r_0068_0011__from_nim33).
arc(r_0068_0010__separated, z_000_68_a_lob_j01_23, arg0).
arc(r_0068_0014__so_that, r_0068_0008__are, scope).
arc(r_0068_0014__so_that, r_0068_0020__should_r_0068_0021__not, restriction).
arc(r_0068_0015__this_r_0068_0017__source, r_0068_0016__major, attrib45).
arc(r_0068_0015__this_r_0068_0017__source, r_0068_0019__trouble, r_0068_0018__of).
arc(r_0068_0020__should_r_0068_0021__not, r_0068_0022__be, scope).
arc(r_0068_0022__be, r_0068_0015__this_r_0068_0017__source, arg0).
arc(r_0068_0022__be, r_0068_0023__present, prd).
%3
r_0068_0020__should_r_0068_0021__not_r_0068_0022__be
should not be
r_0068_0023__present
present
r_0068_0020__should_r_0068_0021__not_r_0068_0022__be->r_0068_0023__present
[prd]
r_0068_0015__this_r_0068_0017__source
this source
r_0068_0020__should_r_0068_0021__not_r_0068_0022__be->r_0068_0015__this_r_0068_0017__source
[arg0]
r_0068_0019__trouble
trouble
r_0068_0015__this_r_0068_0017__source->r_0068_0019__trouble
of
r_0068_0016__major
major
r_0068_0015__this_r_0068_0017__source->r_0068_0016__major
[attrib]
r_0068_0014__so_that
so that
r_0068_0014__so_that->r_0068_0020__should_r_0068_0021__not_r_0068_0022__be
[conj1]
r_0068_0008__are_r_0068_0010__separated
are separated
r_0068_0014__so_that->r_0068_0008__are_r_0068_0010__separated
[conj2]
z_000_68_a_lob_j01_23
r_0068_0008__are_r_0068_0010__separated->z_000_68_a_lob_j01_23
[arg0]
r_0068_0012__one_r_0068_0013__another
one another
r_0068_0008__are_r_0068_0010__separated->r_0068_0012__one_r_0068_0013__another
from [nim]
r_0068_0009__completely
completely
r_0068_0008__are_r_0068_0010__separated->r_0068_0009__completely
[nim]
r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes
the two electrodes
r_0068_0008__are_r_0068_0010__separated->r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes
[arg1]
r_0068_0002__the_r_0068_0004__design
the design
r_0068_0008__are_r_0068_0010__separated->r_0068_0002__the_r_0068_0004__design
In [nim]
r_0068_0003__above
above
r_0068_0002__the_r_0068_0004__design->r_0068_0003__above
[qual]
fof(formula,axiom,
? [R_0068_0003__ABOVE,R_0068_0002__THE_R_0068_0004__DESIGN,R_0068_0005__THE_R_0068_0006__TWO_R_0068_0007__ELECTRODES,R_0068_0009__COMPLETELY,R_0068_0012__ONE_R_0068_0013__ANOTHER,Z_000_68_A_LOB_J01_23,R_0068_0008__ARE_R_0068_0010__SEPARATED,R_0068_0016__MAJOR,R_0068_0019__TROUBLE,R_0068_0015__THIS_R_0068_0017__SOURCE,R_0068_0023__PRESENT,R_0068_0020__SHOULD_R_0068_0021__NOT_R_0068_0022__BE,R_0068_0014__SO_THAT] :
( r_0068_0003__above(R_0068_0003__ABOVE)
& r_0068_0005__the_r_0068_0006__two_r_0068_0007__electrodes(R_0068_0005__THE_R_0068_0006__TWO_R_0068_0007__ELECTRODES)
& r_0068_0009__completely(R_0068_0009__COMPLETELY)
& r_0068_0012__one_r_0068_0013__another(R_0068_0012__ONE_R_0068_0013__ANOTHER)
& r_0068_0016__major(R_0068_0016__MAJOR)
& r_0068_0019__trouble(R_0068_0019__TROUBLE)
& r_0068_0023__present(R_0068_0023__PRESENT)
& z_000_68_a_lob_j01_23(Z_000_68_A_LOB_J01_23)
& r_0068_0014__so_that(R_0068_0014__SO_THAT)
& has_conj1(R_0068_0014__SO_THAT,R_0068_0020__SHOULD_R_0068_0021__NOT_R_0068_0022__BE)
& ~ ( has_prd(R_0068_0020__SHOULD_R_0068_0021__NOT_R_0068_0022__BE,R_0068_0023__PRESENT)
& has_arg0(R_0068_0020__SHOULD_R_0068_0021__NOT_R_0068_0022__BE,R_0068_0015__THIS_R_0068_0017__SOURCE)
& r_0068_0015__this_r_0068_0017__source(R_0068_0015__THIS_R_0068_0017__SOURCE)
& has_r_0068_0018__of(R_0068_0015__THIS_R_0068_0017__SOURCE,R_0068_0019__TROUBLE)
& has_attrib45(R_0068_0015__THIS_R_0068_0017__SOURCE,R_0068_0016__MAJOR) )
& has_conj2(R_0068_0014__SO_THAT,R_0068_0008__ARE_R_0068_0010__SEPARATED)
& r_0068_0008__are_r_0068_0010__separated(R_0068_0008__ARE_R_0068_0010__SEPARATED)
& has_arg0(R_0068_0008__ARE_R_0068_0010__SEPARATED,Z_000_68_A_LOB_J01_23)
& has_r_0068_0011__from_nim33(R_0068_0008__ARE_R_0068_0010__SEPARATED,R_0068_0012__ONE_R_0068_0013__ANOTHER)
& has_nim25(R_0068_0008__ARE_R_0068_0010__SEPARATED,R_0068_0009__COMPLETELY)
& has_arg1(R_0068_0008__ARE_R_0068_0010__SEPARATED,R_0068_0005__THE_R_0068_0006__TWO_R_0068_0007__ELECTRODES)
& has_r_0068_0001__In_nim5(R_0068_0008__ARE_R_0068_0010__SEPARATED,R_0068_0002__THE_R_0068_0004__DESIGN)
& r_0068_0002__the_r_0068_0004__design(R_0068_0002__THE_R_0068_0004__DESIGN)
& has_qual8(R_0068_0002__THE_R_0068_0004__DESIGN,R_0068_0003__ABOVE) ) ).
n68_a_lob_j01
n68_a_lob_j01__1_1_1_1
In
n68_a_lob_j01__1_1_2_1_1
the
n68_a_lob_j01__1_1_2_2_1_1
above
n68_a_lob_j01__1_1_2_3_1
design
n68_a_lob_j01__1_2_1_1
the
n68_a_lob_j01__1_2_2_1
two
n68_a_lob_j01__1_2_3_1
electrodes
n68_a_lob_j01__1_3_1
are
n68_a_lob_j01__1_4_1_1
*
n68_a_lob_j01__1_4_2_1_1
completely
n68_a_lob_j01__1_4_3_1
separated
n68_a_lob_j01__1_4_4_1_1
from
n68_a_lob_j01__1_4_4_2_1_1
one
n68_a_lob_j01__1_4_4_2_2_1
another
n68_a_lob_j01__1_5_1_1
so_that
n68_a_lob_j01__1_5_2_1_1_1
this
n68_a_lob_j01__1_5_2_1_2_1_1
major
n68_a_lob_j01__1_5_2_1_3_1
source
n68_a_lob_j01__1_5_2_1_4_1_1
of
n68_a_lob_j01__1_5_2_1_4_2_1_1
trouble
n68_a_lob_j01__1_5_2_2_1
should
n68_a_lob_j01__1_5_2_3_1
not
n68_a_lob_j01__1_5_2_4_1_1
be
n68_a_lob_j01__1_5_2_4_2_1_1
present
n68_a_lob_j01__1_6_1
.
n68_a_lob_j01__1
IP-MAT
n68_a_lob_j01__1_1
PP-NIM
n68_a_lob_j01__1->n68_a_lob_j01__1_1
n68_a_lob_j01__1_2
NP-SBJ
n68_a_lob_j01__1->n68_a_lob_j01__1_2
n68_a_lob_j01__1_3
BEP;_cat_VePASS_
n68_a_lob_j01__1->n68_a_lob_j01__1_3
n68_a_lob_j01__1_4
IP-PPL-CAT
n68_a_lob_j01__1->n68_a_lob_j01__1_4
n68_a_lob_j01__1_5
PP-SCON
n68_a_lob_j01__1->n68_a_lob_j01__1_5
n68_a_lob_j01__1_6
PUNC
n68_a_lob_j01__1->n68_a_lob_j01__1_6
n68_a_lob_j01__1_1_1
P-ROLE
n68_a_lob_j01__1_1->n68_a_lob_j01__1_1_1
n68_a_lob_j01__1_1_2
NP
n68_a_lob_j01__1_1->n68_a_lob_j01__1_1_2
n68_a_lob_j01__1_1_1->n68_a_lob_j01__1_1_1_1
n68_a_lob_j01__1_1_2_1
D
n68_a_lob_j01__1_1_2->n68_a_lob_j01__1_1_2_1
n68_a_lob_j01__1_1_2_2
ADVP
n68_a_lob_j01__1_1_2->n68_a_lob_j01__1_1_2_2
n68_a_lob_j01__1_1_2_3
N
n68_a_lob_j01__1_1_2->n68_a_lob_j01__1_1_2_3
n68_a_lob_j01__1_1_2_1->n68_a_lob_j01__1_1_2_1_1
n68_a_lob_j01__1_1_2_2_1
ADV
n68_a_lob_j01__1_1_2_2->n68_a_lob_j01__1_1_2_2_1
n68_a_lob_j01__1_1_2_2_1->n68_a_lob_j01__1_1_2_2_1_1
n68_a_lob_j01__1_1_2_3->n68_a_lob_j01__1_1_2_3_1
n68_a_lob_j01__1_2_1
D
n68_a_lob_j01__1_2->n68_a_lob_j01__1_2_1
n68_a_lob_j01__1_2_2
NUM
n68_a_lob_j01__1_2->n68_a_lob_j01__1_2_2
n68_a_lob_j01__1_2_3
NS
n68_a_lob_j01__1_2->n68_a_lob_j01__1_2_3
n68_a_lob_j01__1_2_1->n68_a_lob_j01__1_2_1_1
n68_a_lob_j01__1_2_2->n68_a_lob_j01__1_2_2_1
n68_a_lob_j01__1_2_3->n68_a_lob_j01__1_2_3_1
n68_a_lob_j01__1_3->n68_a_lob_j01__1_3_1
n68_a_lob_j01__1_4_1
NP-LGS
n68_a_lob_j01__1_4->n68_a_lob_j01__1_4_1
n68_a_lob_j01__1_4_2
ADVP-NIM
n68_a_lob_j01__1_4->n68_a_lob_j01__1_4_2
n68_a_lob_j01__1_4_3
VVN;__
n68_a_lob_j01__1_4->n68_a_lob_j01__1_4_3
n68_a_lob_j01__1_4_4
PP-NIM
n68_a_lob_j01__1_4->n68_a_lob_j01__1_4_4
n68_a_lob_j01__1_4_1->n68_a_lob_j01__1_4_1_1
n68_a_lob_j01__1_4_2_1
ADV
n68_a_lob_j01__1_4_2->n68_a_lob_j01__1_4_2_1
n68_a_lob_j01__1_4_2_1->n68_a_lob_j01__1_4_2_1_1
n68_a_lob_j01__1_4_3->n68_a_lob_j01__1_4_3_1
n68_a_lob_j01__1_4_4_1
P-ROLE
n68_a_lob_j01__1_4_4->n68_a_lob_j01__1_4_4_1
n68_a_lob_j01__1_4_4_2
NP
n68_a_lob_j01__1_4_4->n68_a_lob_j01__1_4_4_2
n68_a_lob_j01__1_4_4_1->n68_a_lob_j01__1_4_4_1_1
n68_a_lob_j01__1_4_4_2_1
NUM
n68_a_lob_j01__1_4_4_2->n68_a_lob_j01__1_4_4_2_1
n68_a_lob_j01__1_4_4_2_2
D
n68_a_lob_j01__1_4_4_2->n68_a_lob_j01__1_4_4_2_2
n68_a_lob_j01__1_4_4_2_1->n68_a_lob_j01__1_4_4_2_1_1
n68_a_lob_j01__1_4_4_2_2->n68_a_lob_j01__1_4_4_2_2_1
n68_a_lob_j01__1_5_1
P-CONN
n68_a_lob_j01__1_5->n68_a_lob_j01__1_5_1
n68_a_lob_j01__1_5_2
IP-ADV
n68_a_lob_j01__1_5->n68_a_lob_j01__1_5_2
n68_a_lob_j01__1_5_1->n68_a_lob_j01__1_5_1_1
n68_a_lob_j01__1_5_2_1
NP-SBJ
n68_a_lob_j01__1_5_2->n68_a_lob_j01__1_5_2_1
n68_a_lob_j01__1_5_2_2
MD;_cat_Vi_
n68_a_lob_j01__1_5_2->n68_a_lob_j01__1_5_2_2
n68_a_lob_j01__1_5_2_3
NEG
n68_a_lob_j01__1_5_2->n68_a_lob_j01__1_5_2_3
n68_a_lob_j01__1_5_2_4
IP-INF-CAT
n68_a_lob_j01__1_5_2->n68_a_lob_j01__1_5_2_4
n68_a_lob_j01__1_5_2_1_1
D
n68_a_lob_j01__1_5_2_1->n68_a_lob_j01__1_5_2_1_1
n68_a_lob_j01__1_5_2_1_2
ADJP
n68_a_lob_j01__1_5_2_1->n68_a_lob_j01__1_5_2_1_2
n68_a_lob_j01__1_5_2_1_3
N
n68_a_lob_j01__1_5_2_1->n68_a_lob_j01__1_5_2_1_3
n68_a_lob_j01__1_5_2_1_4
PP
n68_a_lob_j01__1_5_2_1->n68_a_lob_j01__1_5_2_1_4
n68_a_lob_j01__1_5_2_1_1->n68_a_lob_j01__1_5_2_1_1_1
n68_a_lob_j01__1_5_2_1_2_1
ADJ
n68_a_lob_j01__1_5_2_1_2->n68_a_lob_j01__1_5_2_1_2_1
n68_a_lob_j01__1_5_2_1_2_1->n68_a_lob_j01__1_5_2_1_2_1_1
n68_a_lob_j01__1_5_2_1_3->n68_a_lob_j01__1_5_2_1_3_1
n68_a_lob_j01__1_5_2_1_4_1
P-ROLE
n68_a_lob_j01__1_5_2_1_4->n68_a_lob_j01__1_5_2_1_4_1
n68_a_lob_j01__1_5_2_1_4_2
NP
n68_a_lob_j01__1_5_2_1_4->n68_a_lob_j01__1_5_2_1_4_2
n68_a_lob_j01__1_5_2_1_4_1->n68_a_lob_j01__1_5_2_1_4_1_1
n68_a_lob_j01__1_5_2_1_4_2_1
N
n68_a_lob_j01__1_5_2_1_4_2->n68_a_lob_j01__1_5_2_1_4_2_1
n68_a_lob_j01__1_5_2_1_4_2_1->n68_a_lob_j01__1_5_2_1_4_2_1_1
n68_a_lob_j01__1_5_2_2->n68_a_lob_j01__1_5_2_2_1
n68_a_lob_j01__1_5_2_3->n68_a_lob_j01__1_5_2_3_1
n68_a_lob_j01__1_5_2_4_1
BE;_La_
n68_a_lob_j01__1_5_2_4->n68_a_lob_j01__1_5_2_4_1
n68_a_lob_j01__1_5_2_4_2
ADJP-PRD
n68_a_lob_j01__1_5_2_4->n68_a_lob_j01__1_5_2_4_2
n68_a_lob_j01__1_5_2_4_1->n68_a_lob_j01__1_5_2_4_1_1
n68_a_lob_j01__1_5_2_4_2_1
ADJ
n68_a_lob_j01__1_5_2_4_2->n68_a_lob_j01__1_5_2_4_2_1
n68_a_lob_j01__1_5_2_4_2_1->n68_a_lob_j01__1_5_2_4_2_1_1
n68_a_lob_j01__1_6->n68_a_lob_j01__1_6_1
( (IP-MAT (PP-NIM (P-ROLE In;{in})
(NP (D the;{the})
(ADVP (ADV above;{above}))
(N design;{design})))
(NP-SBJ (D the;{the})
(NUM two;{two})
(NS electrodes;{electrode}))
(BEP;_cat_VePASS_ are;{be})
(IP-PPL-CAT (NP-LGS *)
(ADVP-NIM (ADV completely;{completely}))
(VVN;__ separated;{separate})
(PP-NIM (P-ROLE from;{from})
(NP (NUM one;{one})
(D another;{another}))))
(PP-SCON (P-CONN so_that;{so_that})
(IP-ADV (NP-SBJ (D this;{this})
(ADJP (ADJ major;{major}))
(N source;{source})
(PP (P-ROLE of;{of})
(NP (N trouble;{trouble}))))
(MD;_cat_Vi_ should;{shall})
(NEG not;{not})
(IP-INF-CAT (BE;_La_ be;{be})
(ADJP-PRD (ADJ present;{present})))))
(PUNC .))
(ID 68_a_lob_j01))