14_a_paulfellows
n14_a_paulfellows
n14_a_paulfellows__1_1_1
And
n14_a_paulfellows__1_2_1_1
that
n14_a_paulfellows__1_3_1
's
n14_a_paulfellows__1_4_1_1_1_1
why
n14_a_paulfellows__1_4_1_2_1_1
you
n14_a_paulfellows__1_4_1_3_1
've
n14_a_paulfellows__1_4_1_4_1_1
got
n14_a_paulfellows__1_4_1_4_2_1_1
an
n14_a_paulfellows__1_4_1_4_2_2_1
ARM
n14_a_paulfellows__1_4_1_4_3_1_1
in
n14_a_paulfellows__1_4_1_4_3_2_1_1_1
your
n14_a_paulfellows__1_4_1_4_3_2_2_1
phone
n14_a_paulfellows__1_4_1_4_4_1_1
today
n14_a_paulfellows__1_5_1
,
n14_a_paulfellows__1_6_1_1_1_1
it
n14_a_paulfellows__1_6_1_2_1
would
n14_a_paulfellows__1_6_1_3_1_1
take
n14_a_paulfellows__1_6_1_3_2_1_1
no
n14_a_paulfellows__1_6_1_3_2_2_1
power
n14_a_paulfellows__1_6_1_3_3_1_1
to
n14_a_paulfellows__1_6_1_3_3_2_1
keep
n14_a_paulfellows__1_6_1_4_1_1_1_1
a
n14_a_paulfellows__1_6_1_4_1_1_2_1
3
n14_a_paulfellows__1_6_1_4_1_1_3_1
micron
n14_a_paulfellows__1_6_1_4_1_1_4_1
ARM
n14_a_paulfellows__1_6_1_4_1_1_5_1_1
with
n14_a_paulfellows__1_6_1_4_1_1_5_2_1_1
25000
n14_a_paulfellows__1_6_1_4_1_1_5_2_2_1
transistors
n14_a_paulfellows__1_6_1_4_1_2_1
would
n14_a_paulfellows__1_6_1_4_1_3_1_1
run
n14_a_paulfellows__1_6_1_4_1_3_2_1_1
for
n14_a_paulfellows__1_6_1_4_1_3_2_2_1_1
30
n14_a_paulfellows__1_6_1_4_1_3_2_2_2_1
seconds
n14_a_paulfellows__1_6_1_4_1_3_3_1_1
off
n14_a_paulfellows__1_6_1_4_1_3_3_2_1_1
the
n14_a_paulfellows__1_6_1_4_1_3_3_2_2_1
energy
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_1_1
stored
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_1_1
in
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_1_1
the
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_2_1
fan
n14_a_paulfellows__1_7_1
.
n14_a_paulfellows__1
IP-MAT
n14_a_paulfellows__1_1
CONJ;_cl_
n14_a_paulfellows__1->n14_a_paulfellows__1_1
n14_a_paulfellows__1_2
NP-SBJ
n14_a_paulfellows__1->n14_a_paulfellows__1_2
n14_a_paulfellows__1_3
BEP;_equ_Vw_
n14_a_paulfellows__1->n14_a_paulfellows__1_3
n14_a_paulfellows__1_4
CP-QUE-PRD
n14_a_paulfellows__1->n14_a_paulfellows__1_4
n14_a_paulfellows__1_5
PUNC
n14_a_paulfellows__1->n14_a_paulfellows__1_5
n14_a_paulfellows__1_6
PRN
n14_a_paulfellows__1->n14_a_paulfellows__1_6
n14_a_paulfellows__1_7
PUNC
n14_a_paulfellows__1->n14_a_paulfellows__1_7
n14_a_paulfellows__1_1->n14_a_paulfellows__1_1_1
n14_a_paulfellows__1_2_1
D;_nphd_
n14_a_paulfellows__1_2->n14_a_paulfellows__1_2_1
n14_a_paulfellows__1_2_1->n14_a_paulfellows__1_2_1_1
n14_a_paulfellows__1_3->n14_a_paulfellows__1_3_1
n14_a_paulfellows__1_4_1
IP-SUB
n14_a_paulfellows__1_4->n14_a_paulfellows__1_4_1
n14_a_paulfellows__1_4_1_1
ADVP-NIM
n14_a_paulfellows__1_4_1->n14_a_paulfellows__1_4_1_1
n14_a_paulfellows__1_4_1_2
NP-SBJ
n14_a_paulfellows__1_4_1->n14_a_paulfellows__1_4_1_2
n14_a_paulfellows__1_4_1_3
HVP;_cat_Ve_
n14_a_paulfellows__1_4_1->n14_a_paulfellows__1_4_1_3
n14_a_paulfellows__1_4_1_4
IP-PPL-CAT
n14_a_paulfellows__1_4_1->n14_a_paulfellows__1_4_1_4
n14_a_paulfellows__1_4_1_1_1
WADV
n14_a_paulfellows__1_4_1_1->n14_a_paulfellows__1_4_1_1_1
n14_a_paulfellows__1_4_1_1_1->n14_a_paulfellows__1_4_1_1_1_1
n14_a_paulfellows__1_4_1_2_1
PRO
n14_a_paulfellows__1_4_1_2->n14_a_paulfellows__1_4_1_2_1
n14_a_paulfellows__1_4_1_2_1->n14_a_paulfellows__1_4_1_2_1_1
n14_a_paulfellows__1_4_1_3->n14_a_paulfellows__1_4_1_3_1
n14_a_paulfellows__1_4_1_4_1
VVN;_Tn_
n14_a_paulfellows__1_4_1_4->n14_a_paulfellows__1_4_1_4_1
n14_a_paulfellows__1_4_1_4_2
NP-OB1
n14_a_paulfellows__1_4_1_4->n14_a_paulfellows__1_4_1_4_2
n14_a_paulfellows__1_4_1_4_3
PP-NIM
n14_a_paulfellows__1_4_1_4->n14_a_paulfellows__1_4_1_4_3
n14_a_paulfellows__1_4_1_4_4
NP-NIM
n14_a_paulfellows__1_4_1_4->n14_a_paulfellows__1_4_1_4_4
n14_a_paulfellows__1_4_1_4_1->n14_a_paulfellows__1_4_1_4_1_1
n14_a_paulfellows__1_4_1_4_2_1
D
n14_a_paulfellows__1_4_1_4_2->n14_a_paulfellows__1_4_1_4_2_1
n14_a_paulfellows__1_4_1_4_2_2
N
n14_a_paulfellows__1_4_1_4_2->n14_a_paulfellows__1_4_1_4_2_2
n14_a_paulfellows__1_4_1_4_2_1->n14_a_paulfellows__1_4_1_4_2_1_1
n14_a_paulfellows__1_4_1_4_2_2->n14_a_paulfellows__1_4_1_4_2_2_1
n14_a_paulfellows__1_4_1_4_3_1
P-ROLE
n14_a_paulfellows__1_4_1_4_3->n14_a_paulfellows__1_4_1_4_3_1
n14_a_paulfellows__1_4_1_4_3_2
NP
n14_a_paulfellows__1_4_1_4_3->n14_a_paulfellows__1_4_1_4_3_2
n14_a_paulfellows__1_4_1_4_3_1->n14_a_paulfellows__1_4_1_4_3_1_1
n14_a_paulfellows__1_4_1_4_3_2_1
NP-GEN
n14_a_paulfellows__1_4_1_4_3_2->n14_a_paulfellows__1_4_1_4_3_2_1
n14_a_paulfellows__1_4_1_4_3_2_2
N
n14_a_paulfellows__1_4_1_4_3_2->n14_a_paulfellows__1_4_1_4_3_2_2
n14_a_paulfellows__1_4_1_4_3_2_1_1
PRO;_genm_
n14_a_paulfellows__1_4_1_4_3_2_1->n14_a_paulfellows__1_4_1_4_3_2_1_1
n14_a_paulfellows__1_4_1_4_3_2_1_1->n14_a_paulfellows__1_4_1_4_3_2_1_1_1
n14_a_paulfellows__1_4_1_4_3_2_2->n14_a_paulfellows__1_4_1_4_3_2_2_1
n14_a_paulfellows__1_4_1_4_4_1
N
n14_a_paulfellows__1_4_1_4_4->n14_a_paulfellows__1_4_1_4_4_1
n14_a_paulfellows__1_4_1_4_4_1->n14_a_paulfellows__1_4_1_4_4_1_1
n14_a_paulfellows__1_5->n14_a_paulfellows__1_5_1
n14_a_paulfellows__1_6_1
IP-MAT
n14_a_paulfellows__1_6->n14_a_paulfellows__1_6_1
n14_a_paulfellows__1_6_1_1
NP-SBJ
n14_a_paulfellows__1_6_1->n14_a_paulfellows__1_6_1_1
n14_a_paulfellows__1_6_1_2
MD;_cat_Vi_
n14_a_paulfellows__1_6_1->n14_a_paulfellows__1_6_1_2
n14_a_paulfellows__1_6_1_3
IP-INF-CAT
n14_a_paulfellows__1_6_1->n14_a_paulfellows__1_6_1_3
n14_a_paulfellows__1_6_1_4
PRN
n14_a_paulfellows__1_6_1->n14_a_paulfellows__1_6_1_4
n14_a_paulfellows__1_6_1_1_1
PRO;_provisional_
n14_a_paulfellows__1_6_1_1->n14_a_paulfellows__1_6_1_1_1
n14_a_paulfellows__1_6_1_1_1->n14_a_paulfellows__1_6_1_1_1_1
n14_a_paulfellows__1_6_1_2->n14_a_paulfellows__1_6_1_2_1
n14_a_paulfellows__1_6_1_3_1
VB;__
n14_a_paulfellows__1_6_1_3->n14_a_paulfellows__1_6_1_3_1
n14_a_paulfellows__1_6_1_3_2
NP-OB1
n14_a_paulfellows__1_6_1_3->n14_a_paulfellows__1_6_1_3_2
n14_a_paulfellows__1_6_1_3_3
IP-INF-NSBJ
n14_a_paulfellows__1_6_1_3->n14_a_paulfellows__1_6_1_3_3
n14_a_paulfellows__1_6_1_3_1->n14_a_paulfellows__1_6_1_3_1_1
n14_a_paulfellows__1_6_1_3_2_1
Q
n14_a_paulfellows__1_6_1_3_2->n14_a_paulfellows__1_6_1_3_2_1
n14_a_paulfellows__1_6_1_3_2_2
N
n14_a_paulfellows__1_6_1_3_2->n14_a_paulfellows__1_6_1_3_2_2
n14_a_paulfellows__1_6_1_3_2_1->n14_a_paulfellows__1_6_1_3_2_1_1
n14_a_paulfellows__1_6_1_3_2_2->n14_a_paulfellows__1_6_1_3_2_2_1
n14_a_paulfellows__1_6_1_3_3_1
TO
n14_a_paulfellows__1_6_1_3_3->n14_a_paulfellows__1_6_1_3_3_1
n14_a_paulfellows__1_6_1_3_3_2
VB;__
n14_a_paulfellows__1_6_1_3_3->n14_a_paulfellows__1_6_1_3_3_2
n14_a_paulfellows__1_6_1_3_3_1->n14_a_paulfellows__1_6_1_3_3_1_1
n14_a_paulfellows__1_6_1_3_3_2->n14_a_paulfellows__1_6_1_3_3_2_1
n14_a_paulfellows__1_6_1_4_1
IP-MAT
n14_a_paulfellows__1_6_1_4->n14_a_paulfellows__1_6_1_4_1
n14_a_paulfellows__1_6_1_4_1_1
NP-SBJ
n14_a_paulfellows__1_6_1_4_1->n14_a_paulfellows__1_6_1_4_1_1
n14_a_paulfellows__1_6_1_4_1_2
MD;_cat_Vi_
n14_a_paulfellows__1_6_1_4_1->n14_a_paulfellows__1_6_1_4_1_2
n14_a_paulfellows__1_6_1_4_1_3
IP-INF-CAT
n14_a_paulfellows__1_6_1_4_1->n14_a_paulfellows__1_6_1_4_1_3
n14_a_paulfellows__1_6_1_4_1_1_1
D
n14_a_paulfellows__1_6_1_4_1_1->n14_a_paulfellows__1_6_1_4_1_1_1
n14_a_paulfellows__1_6_1_4_1_1_2
NUM
n14_a_paulfellows__1_6_1_4_1_1->n14_a_paulfellows__1_6_1_4_1_1_2
n14_a_paulfellows__1_6_1_4_1_1_3
N
n14_a_paulfellows__1_6_1_4_1_1->n14_a_paulfellows__1_6_1_4_1_1_3
n14_a_paulfellows__1_6_1_4_1_1_4
NPR
n14_a_paulfellows__1_6_1_4_1_1->n14_a_paulfellows__1_6_1_4_1_1_4
n14_a_paulfellows__1_6_1_4_1_1_5
PP
n14_a_paulfellows__1_6_1_4_1_1->n14_a_paulfellows__1_6_1_4_1_1_5
n14_a_paulfellows__1_6_1_4_1_1_1->n14_a_paulfellows__1_6_1_4_1_1_1_1
n14_a_paulfellows__1_6_1_4_1_1_2->n14_a_paulfellows__1_6_1_4_1_1_2_1
n14_a_paulfellows__1_6_1_4_1_1_3->n14_a_paulfellows__1_6_1_4_1_1_3_1
n14_a_paulfellows__1_6_1_4_1_1_4->n14_a_paulfellows__1_6_1_4_1_1_4_1
n14_a_paulfellows__1_6_1_4_1_1_5_1
P-ROLE
n14_a_paulfellows__1_6_1_4_1_1_5->n14_a_paulfellows__1_6_1_4_1_1_5_1
n14_a_paulfellows__1_6_1_4_1_1_5_2
NP
n14_a_paulfellows__1_6_1_4_1_1_5->n14_a_paulfellows__1_6_1_4_1_1_5_2
n14_a_paulfellows__1_6_1_4_1_1_5_1->n14_a_paulfellows__1_6_1_4_1_1_5_1_1
n14_a_paulfellows__1_6_1_4_1_1_5_2_1
NUM
n14_a_paulfellows__1_6_1_4_1_1_5_2->n14_a_paulfellows__1_6_1_4_1_1_5_2_1
n14_a_paulfellows__1_6_1_4_1_1_5_2_2
NS
n14_a_paulfellows__1_6_1_4_1_1_5_2->n14_a_paulfellows__1_6_1_4_1_1_5_2_2
n14_a_paulfellows__1_6_1_4_1_1_5_2_1->n14_a_paulfellows__1_6_1_4_1_1_5_2_1_1
n14_a_paulfellows__1_6_1_4_1_1_5_2_2->n14_a_paulfellows__1_6_1_4_1_1_5_2_2_1
n14_a_paulfellows__1_6_1_4_1_2->n14_a_paulfellows__1_6_1_4_1_2_1
n14_a_paulfellows__1_6_1_4_1_3_1
VB;__
n14_a_paulfellows__1_6_1_4_1_3->n14_a_paulfellows__1_6_1_4_1_3_1
n14_a_paulfellows__1_6_1_4_1_3_2
PP-NIM
n14_a_paulfellows__1_6_1_4_1_3->n14_a_paulfellows__1_6_1_4_1_3_2
n14_a_paulfellows__1_6_1_4_1_3_3
PP-NIM
n14_a_paulfellows__1_6_1_4_1_3->n14_a_paulfellows__1_6_1_4_1_3_3
n14_a_paulfellows__1_6_1_4_1_3_1->n14_a_paulfellows__1_6_1_4_1_3_1_1
n14_a_paulfellows__1_6_1_4_1_3_2_1
P-ROLE
n14_a_paulfellows__1_6_1_4_1_3_2->n14_a_paulfellows__1_6_1_4_1_3_2_1
n14_a_paulfellows__1_6_1_4_1_3_2_2
NP
n14_a_paulfellows__1_6_1_4_1_3_2->n14_a_paulfellows__1_6_1_4_1_3_2_2
n14_a_paulfellows__1_6_1_4_1_3_2_1->n14_a_paulfellows__1_6_1_4_1_3_2_1_1
n14_a_paulfellows__1_6_1_4_1_3_2_2_1
NUM
n14_a_paulfellows__1_6_1_4_1_3_2_2->n14_a_paulfellows__1_6_1_4_1_3_2_2_1
n14_a_paulfellows__1_6_1_4_1_3_2_2_2
NS
n14_a_paulfellows__1_6_1_4_1_3_2_2->n14_a_paulfellows__1_6_1_4_1_3_2_2_2
n14_a_paulfellows__1_6_1_4_1_3_2_2_1->n14_a_paulfellows__1_6_1_4_1_3_2_2_1_1
n14_a_paulfellows__1_6_1_4_1_3_2_2_2->n14_a_paulfellows__1_6_1_4_1_3_2_2_2_1
n14_a_paulfellows__1_6_1_4_1_3_3_1
P-ROLE
n14_a_paulfellows__1_6_1_4_1_3_3->n14_a_paulfellows__1_6_1_4_1_3_3_1
n14_a_paulfellows__1_6_1_4_1_3_3_2
NP
n14_a_paulfellows__1_6_1_4_1_3_3->n14_a_paulfellows__1_6_1_4_1_3_3_2
n14_a_paulfellows__1_6_1_4_1_3_3_1->n14_a_paulfellows__1_6_1_4_1_3_3_1_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_1
D
n14_a_paulfellows__1_6_1_4_1_3_3_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_2
N
n14_a_paulfellows__1_6_1_4_1_3_3_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_2
n14_a_paulfellows__1_6_1_4_1_3_3_2_3
IP-PPL
n14_a_paulfellows__1_6_1_4_1_3_3_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3
n14_a_paulfellows__1_6_1_4_1_3_3_2_1->n14_a_paulfellows__1_6_1_4_1_3_3_2_1_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_2_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_1
VVN;__
n14_a_paulfellows__1_6_1_4_1_3_3_2_3->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2
PP-NIM
n14_a_paulfellows__1_6_1_4_1_3_3_2_3->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_1->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_1_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_1
P-ROLE
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2
NP
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_1->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_1_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_1
D
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_2
N
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_2
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_1->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_1_1
n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_2->n14_a_paulfellows__1_6_1_4_1_3_3_2_3_2_2_2_1
n14_a_paulfellows__1_7->n14_a_paulfellows__1_7_1
( (IP-MAT (CONJ;_cl_ And;{and})
(NP-SBJ (D;_nphd_ that;{that}))
(BEP;_equ_Vw_ <apos>s;{be})
(CP-QUE-PRD (IP-SUB (ADVP-NIM (WADV why;{why}))
(NP-SBJ (PRO you;{you}))
(HVP;_cat_Ve_ <apos>ve;{have})
(IP-PPL-CAT (VVN;_Tn_ got;{get})
(NP-OB1 (D an;{an})
(N ARM;{arm}))
(PP-NIM (P-ROLE in;{in})
(NP (NP-GEN (PRO;_genm_ your;{your}))
(N phone;{phone})))
(NP-NIM (N today;{today})))))
(PUNC ,)
(PRN (IP-MAT (NP-SBJ (PRO;_provisional_ it;{it}))
(MD;_cat_Vi_ would;{will})
(IP-INF-CAT (VB;__ take;{take})
(NP-OB1 (Q no;{no})
(N power;{power}))
(IP-INF-NSBJ (TO to;{to})
(VB;__ keep;{keep})))
(PRN (IP-MAT (NP-SBJ (D a;{a})
(NUM 3)
(N micron;{micron})
(NPR ARM;{ARM})
(PP (P-ROLE with;{with})
(NP (NUM 25000)
(NS transistors;{transistor}))))
(MD;_cat_Vi_ would;{will})
(IP-INF-CAT (VB;__ run;{run})
(PP-NIM (P-ROLE for;{for})
(NP (NUM 30)
(NS seconds;{second})))
(PP-NIM (P-ROLE off;{off})
(NP (D the;{the})
(N energy;{energy})
(IP-PPL (VVN;__ stored;{store})
(PP-NIM (P-ROLE in;{in})
(NP (D the;{the})
(N fan;{fan})))))))))))
(PUNC .))
(ID 14_a_paulfellows))
%3
r_0014_0037__stored
stored
r_0014_0039__the_r_0014_0040__fan
the fan
r_0014_0037__stored->r_0014_0039__the_r_0014_0040__fan
in [nim]
r_0014_0035__the_r_0014_0036__energy
the energy
r_0014_0037__stored->r_0014_0035__the_r_0014_0036__energy
[inv_arg0]
r_0014_0030__run
run
r_0014_0030__run->r_0014_0035__the_r_0014_0036__energy
off [nim]
r_0014_0032__30_r_0014_0033__seconds
30 seconds
r_0014_0030__run->r_0014_0032__30_r_0014_0033__seconds
for [nim]
r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM
a 3 micron ARM
r_0014_0030__run->r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM
[arg0]
r_0014_0027__25000_r_0014_0028__transistors
25000 transistors
r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM->r_0014_0027__25000_r_0014_0028__transistors
with
r_0014_0029__would
would
r_0014_0029__would->r_0014_0030__run
[scope]
r_0014_0021__keep
keep
z_0014_5002
r_0014_0021__keep->z_0014_5002
[arg0]
r_0014_0018__no__quant
no [quant]
r_0014_0019__power
power
r_0014_0018__no__quant->r_0014_0019__power
[restriction]
r_0014_0016__would
would
r_0014_0018__no__quant->r_0014_0016__would
[scope]
r_0014_0016__would->r_0014_0029__would
[prn]
r_0014_0017__take
take
r_0014_0016__would->r_0014_0017__take
[scope]
r_0014_0017__take->r_0014_0021__keep
[arg0]
r_0014_0017__take->r_0014_0019__power
[arg1]
r_0014_0012__phone
phone
r_0014_0005__you
you
r_0014_0012__phone->r_0014_0005__you
[gen]
r_0014_0007__got
got
r_0014_0007__got->r_0014_0012__phone
in [nim]
r_0014_0007__got->r_0014_0005__you
[arg0]
r_0014_0013__today
today
r_0014_0007__got->r_0014_0013__today
[nim]
r_0014_0008__an_r_0014_0009__ARM
an ARM
r_0014_0007__got->r_0014_0008__an_r_0014_0009__ARM
[arg1]
r_0014_0006___apos_ve
've
r_0014_0006___apos_ve->r_0014_0007__got
[scope]
r_0014_0004__why
why
r_0014_0006___apos_ve->r_0014_0004__why
[nim]
r_0014_0003___apos_s
's
r_0014_0003___apos_s->r_0014_0018__no__quant
[prn]
r_0014_0003___apos_s->r_0014_0006___apos_ve
[prd]
r_0014_0002__that
that
r_0014_0003___apos_s->r_0014_0002__that
[arg0]
arc(r_0014_0003___apos_s,r_0014_0002__that,arg0).
arc(r_0014_0003___apos_s,r_0014_0006___apos_ve,prd).
arc(r_0014_0003___apos_s,r_0014_0018__no__quant,prn).
arc(r_0014_0006___apos_ve,r_0014_0004__why,nim).
arc(r_0014_0006___apos_ve,r_0014_0007__got,scope).
arc(r_0014_0007__got,r_0014_0005__you,arg0).
arc(r_0014_0007__got,r_0014_0008__an_r_0014_0009__ARM,arg1).
arc(r_0014_0007__got,r_0014_0012__phone,r_0014_0010__in__nim).
arc(r_0014_0007__got,r_0014_0013__today,nim).
arc(r_0014_0012__phone,r_0014_0005__you,gen).
arc(r_0014_0016__would,r_0014_0017__take,scope).
arc(r_0014_0016__would,r_0014_0029__would,prn).
arc(r_0014_0017__take,r_0014_0019__power,arg1).
arc(r_0014_0017__take,r_0014_0021__keep,arg0).
arc(r_0014_0018__no__quant,r_0014_0016__would,scope).
arc(r_0014_0018__no__quant,r_0014_0019__power,restriction).
arc(r_0014_0021__keep,z_0014_5002,arg0).
arc(r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM,r_0014_0027__25000_r_0014_0028__transistors,r_0014_0026__with).
arc(r_0014_0029__would,r_0014_0030__run,scope).
arc(r_0014_0030__run,r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM,arg0).
arc(r_0014_0030__run,r_0014_0032__30_r_0014_0033__seconds,r_0014_0031__for__nim).
arc(r_0014_0030__run,r_0014_0035__the_r_0014_0036__energy,r_0014_0034__off__nim).
arc(r_0014_0037__stored,r_0014_0035__the_r_0014_0036__energy,inv_arg0).
arc(r_0014_0037__stored,r_0014_0039__the_r_0014_0040__fan,r_0014_0038__in__nim).
%3
r_0014_0003___apos_s
's
r_0014_0002__that
that
r_0014_0003___apos_s->r_0014_0002__that
[arg0]
r_0014_0006___apos_ve_r_0014_0007__got
've got
r_0014_0003___apos_s->r_0014_0006___apos_ve_r_0014_0007__got
[prd]
r_0014_0018__no__quant
no [quant]
r_0014_0003___apos_s->r_0014_0018__no__quant
[prn]
r_0014_0004__why
why
r_0014_0006___apos_ve_r_0014_0007__got->r_0014_0004__why
[nim]
r_0014_0005__you
you
r_0014_0006___apos_ve_r_0014_0007__got->r_0014_0005__you
[arg0]
r_0014_0008__an_r_0014_0009__ARM
an ARM
r_0014_0006___apos_ve_r_0014_0007__got->r_0014_0008__an_r_0014_0009__ARM
[arg1]
r_0014_0012__phone
phone
r_0014_0006___apos_ve_r_0014_0007__got->r_0014_0012__phone
in [nim]
r_0014_0013__today
today
r_0014_0006___apos_ve_r_0014_0007__got->r_0014_0013__today
[nim]
r_0014_0016__would_r_0014_0017__take
would take
r_0014_0018__no__quant->r_0014_0016__would_r_0014_0017__take
[scope]
r_0014_0019__power
power
r_0014_0018__no__quant->r_0014_0019__power
[restriction]
r_0014_0012__phone->r_0014_0005__you
[gen]
r_0014_0029__would_r_0014_0030__run
would run
r_0014_0016__would_r_0014_0017__take->r_0014_0029__would_r_0014_0030__run
[prn]
r_0014_0016__would_r_0014_0017__take->r_0014_0019__power
[arg1]
r_0014_0021__keep
keep
r_0014_0016__would_r_0014_0017__take->r_0014_0021__keep
[arg0]
r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM
a 3 micron ARM
r_0014_0029__would_r_0014_0030__run->r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM
[arg0]
r_0014_0032__30_r_0014_0033__seconds
30 seconds
r_0014_0029__would_r_0014_0030__run->r_0014_0032__30_r_0014_0033__seconds
for [nim]
r_0014_0035__the_r_0014_0036__energy
the energy
r_0014_0029__would_r_0014_0030__run->r_0014_0035__the_r_0014_0036__energy
off [nim]
z_0014_5002
r_0014_0021__keep->z_0014_5002
[arg0]
r_0014_0027__25000_r_0014_0028__transistors
25000 transistors
r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM->r_0014_0027__25000_r_0014_0028__transistors
with
r_0014_0037__stored
stored
r_0014_0035__the_r_0014_0036__energy->r_0014_0037__stored
[inv_arg0]
r_0014_0039__the_r_0014_0040__fan
the fan
r_0014_0037__stored->r_0014_0039__the_r_0014_0040__fan
in [nim]
fof(formula,axiom,
? [R_0014_0002__THAT,R_0014_0004__WHY,R_0014_0005__YOU,R_0014_0008__AN_R_0014_0009__ARM,R_0014_0012__PHONE,R_0014_0013__TODAY,R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0003___APOS_S] :
( r_0014_0002__that(R_0014_0002__THAT)
& r_0014_0004__why(R_0014_0004__WHY)
& r_0014_0005__you(R_0014_0005__YOU)
& r_0014_0008__an_r_0014_0009__ARM(R_0014_0008__AN_R_0014_0009__ARM)
& r_0014_0013__today(R_0014_0013__TODAY)
& r_0014_0003___apos_s(R_0014_0003___APOS_S)
& ! [R_0014_0019__POWER] :
( r_0014_0019__power(R_0014_0019__POWER)
=> ? [R_0014_0027__25000_R_0014_0028__TRANSISTORS,R_0014_0022__A_R_0014_0023__3_R_0014_0024__MICRON_R_0014_0025__ARM,R_0014_0032__30_R_0014_0033__SECONDS,R_0014_0039__THE_R_0014_0040__FAN,R_0014_0037__STORED,R_0014_0035__THE_R_0014_0036__ENERGY,R_0014_0029__WOULD_R_0014_0030__RUN,Z_0014_5002,R_0014_0021__KEEP,R_0014_0016__WOULD_R_0014_0017__TAKE] :
( r_0014_0027__25000_r_0014_0028__transistors(R_0014_0027__25000_R_0014_0028__TRANSISTORS)
& r_0014_0032__30_r_0014_0033__seconds(R_0014_0032__30_R_0014_0033__SECONDS)
& r_0014_0039__the_r_0014_0040__fan(R_0014_0039__THE_R_0014_0040__FAN)
& z_0014_5002(Z_0014_5002)
& r_0014_0016__would_r_0014_0017__take(R_0014_0016__WOULD_R_0014_0017__TAKE)
& has_arg0(R_0014_0016__WOULD_R_0014_0017__TAKE,R_0014_0021__KEEP)
& r_0014_0021__keep(R_0014_0021__KEEP)
& has_arg0(R_0014_0021__KEEP,Z_0014_5002)
& has_arg1(R_0014_0016__WOULD_R_0014_0017__TAKE,R_0014_0019__POWER)
& has_prn(R_0014_0016__WOULD_R_0014_0017__TAKE,R_0014_0029__WOULD_R_0014_0030__RUN)
& r_0014_0029__would_r_0014_0030__run(R_0014_0029__WOULD_R_0014_0030__RUN)
& has_r_0014_0034__off__nim(R_0014_0029__WOULD_R_0014_0030__RUN,R_0014_0035__THE_R_0014_0036__ENERGY)
& r_0014_0035__the_r_0014_0036__energy(R_0014_0035__THE_R_0014_0036__ENERGY)
& has_inv_arg0(R_0014_0035__THE_R_0014_0036__ENERGY,R_0014_0037__STORED)
& r_0014_0037__stored(R_0014_0037__STORED)
& has_r_0014_0038__in__nim(R_0014_0037__STORED,R_0014_0039__THE_R_0014_0040__FAN)
& has_r_0014_0031__for__nim(R_0014_0029__WOULD_R_0014_0030__RUN,R_0014_0032__30_R_0014_0033__SECONDS)
& has_arg0(R_0014_0029__WOULD_R_0014_0030__RUN,R_0014_0022__A_R_0014_0023__3_R_0014_0024__MICRON_R_0014_0025__ARM)
& r_0014_0022__a_r_0014_0023__3_r_0014_0024__micron_r_0014_0025__ARM(R_0014_0022__A_R_0014_0023__3_R_0014_0024__MICRON_R_0014_0025__ARM)
& has_r_0014_0026__with(R_0014_0022__A_R_0014_0023__3_R_0014_0024__MICRON_R_0014_0025__ARM,R_0014_0027__25000_R_0014_0028__TRANSISTORS) ) )
& has_prd(R_0014_0003___APOS_S,R_0014_0006___APOS_VE_R_0014_0007__GOT)
& r_0014_0006___apos_ve_r_0014_0007__got(R_0014_0006___APOS_VE_R_0014_0007__GOT)
& has_nim(R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0013__TODAY)
& has_r_0014_0010__in__nim(R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0012__PHONE)
& r_0014_0012__phone(R_0014_0012__PHONE)
& has_gen(R_0014_0012__PHONE,R_0014_0005__YOU)
& has_arg1(R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0008__AN_R_0014_0009__ARM)
& has_arg0(R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0005__YOU)
& has_nim(R_0014_0006___APOS_VE_R_0014_0007__GOT,R_0014_0004__WHY)
& has_arg0(R_0014_0003___APOS_S,R_0014_0002__THAT) ) ).