27_a_paulfellows
So this was plugged into, via a tube interface, a BBC Micro, so it was a giant second processor (as it says on the board “A500 second processor”).
%3
r_0027_0003__was
was
r_0027_0001__So
So
r_0027_0003__was->r_0027_0001__So
[nim]
r_0027_0004__plugged
plugged
r_0027_0003__was->r_0027_0004__plugged
[scope]
r_0027_0002__this
this
r_0027_0004__plugged->r_0027_0002__this
[arg1]
r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro
a BBC Micro
r_0027_0004__plugged->r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro
into [clr]
z_000_27_a_paulfellows_11
r_0027_0004__plugged->z_000_27_a_paulfellows_11
[arg0]
r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface
a tube interface
r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro->r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface
via
arc(r_0027_0003__was, r_0027_0001__So, nim2).
arc(r_0027_0003__was, r_0027_0004__plugged, scope).
arc(r_0027_0004__plugged, r_0027_0002__this, arg1).
arc(r_0027_0004__plugged, r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro, r_0027_0005__into_clr20).
arc(r_0027_0004__plugged, z_000_27_a_paulfellows_11, arg0).
arc(r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro, r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface, r_0027_0007__via).
%3
r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro
a BBC Micro
r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface
a tube interface
r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro->r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface
via
r_0027_0003__was_r_0027_0004__plugged
was plugged
r_0027_0003__was_r_0027_0004__plugged->r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro
into [clr]
z_000_27_a_paulfellows_11
r_0027_0003__was_r_0027_0004__plugged->z_000_27_a_paulfellows_11
[arg0]
r_0027_0002__this
this
r_0027_0003__was_r_0027_0004__plugged->r_0027_0002__this
[arg1]
r_0027_0001__So
So
r_0027_0003__was_r_0027_0004__plugged->r_0027_0001__So
[nim]
fof(formula,axiom,
? [R_0027_0001__SO,R_0027_0002__THIS,R_0027_0008__A_R_0027_0009__TUBE_R_0027_0010__INTERFACE,R_0027_0012__A_R_0027_0013__BBC_R_0027_0014__MICRO,Z_000_27_A_PAULFELLOWS_11,R_0027_0003__WAS_R_0027_0004__PLUGGED] :
( r_0027_0001__So(R_0027_0001__SO)
& r_0027_0002__this(R_0027_0002__THIS)
& r_0027_0008__a_r_0027_0009__tube_r_0027_0010__interface(R_0027_0008__A_R_0027_0009__TUBE_R_0027_0010__INTERFACE)
& z_000_27_a_paulfellows_11(Z_000_27_A_PAULFELLOWS_11)
& r_0027_0003__was_r_0027_0004__plugged(R_0027_0003__WAS_R_0027_0004__PLUGGED)
& has_arg0(R_0027_0003__WAS_R_0027_0004__PLUGGED,Z_000_27_A_PAULFELLOWS_11)
& has_r_0027_0005__into_clr20(R_0027_0003__WAS_R_0027_0004__PLUGGED,R_0027_0012__A_R_0027_0013__BBC_R_0027_0014__MICRO)
& r_0027_0012__a_r_0027_0013__BBC_r_0027_0014__Micro(R_0027_0012__A_R_0027_0013__BBC_R_0027_0014__MICRO)
& has_r_0027_0007__via(R_0027_0012__A_R_0027_0013__BBC_R_0027_0014__MICRO,R_0027_0008__A_R_0027_0009__TUBE_R_0027_0010__INTERFACE)
& has_arg1(R_0027_0003__WAS_R_0027_0004__PLUGGED,R_0027_0002__THIS)
& has_nim2(R_0027_0003__WAS_R_0027_0004__PLUGGED,R_0027_0001__SO) ) ).
n27_a_paulfellows
n27_a_paulfellows__1_1_1_1
So
n27_a_paulfellows__1_2_1_1
this
n27_a_paulfellows__1_3_1
was
n27_a_paulfellows__1_4_1_1
*
n27_a_paulfellows__1_4_2_1
plugged
n27_a_paulfellows__1_4_3_1_1
into
n27_a_paulfellows__1_4_3_2_1
,
n27_a_paulfellows__1_4_3_3_1_1_1
via
n27_a_paulfellows__1_4_3_3_1_2_1_1
a
n27_a_paulfellows__1_4_3_3_1_2_2_1
tube
n27_a_paulfellows__1_4_3_3_1_2_3_1
interface
n27_a_paulfellows__1_4_3_3_2_1
,
n27_a_paulfellows__1_4_3_3_3_1
a
n27_a_paulfellows__1_4_3_3_4_1
BBC
n27_a_paulfellows__1_4_3_3_5_1
Micro
n27_a_paulfellows__1_5_1
,
n27_a_paulfellows__1_6_1_1_1_1
so
n27_a_paulfellows__1_6_1_2_1_1
it
n27_a_paulfellows__1_6_1_3_1
was
n27_a_paulfellows__1_6_1_4_1_1
a
n27_a_paulfellows__1_6_1_4_2_1_1
giant
n27_a_paulfellows__1_6_1_4_3_1_1
second
n27_a_paulfellows__1_6_1_4_4_1
processor
n27_a_paulfellows__1_6_1_4_5_1
-LRB-
n27_a_paulfellows__1_6_1_4_6_1_1_1_1
as
n27_a_paulfellows__1_6_1_4_6_1_1_2_1_1_1
it
n27_a_paulfellows__1_6_1_4_6_1_1_2_2_1
says
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_1_1
on
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_1_1
the
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_2_1
board
n27_a_paulfellows__1_6_1_4_6_1_2_1
<ldquo>
n27_a_paulfellows__1_6_1_4_6_1_3_1
A500
n27_a_paulfellows__1_6_1_4_6_1_4_1_1
second
n27_a_paulfellows__1_6_1_4_6_1_5_1
processor
n27_a_paulfellows__1_6_1_4_6_1_6_1
<rdquo>
n27_a_paulfellows__1_6_1_4_7_1
-RRB-
n27_a_paulfellows__1_7_1
.
n27_a_paulfellows__1
IP-MAT
n27_a_paulfellows__1_1
ADVP-NIM
n27_a_paulfellows__1->n27_a_paulfellows__1_1
n27_a_paulfellows__1_2
NP-SBJ
n27_a_paulfellows__1->n27_a_paulfellows__1_2
n27_a_paulfellows__1_3
BED;_cat_VePASS_
n27_a_paulfellows__1->n27_a_paulfellows__1_3
n27_a_paulfellows__1_4
IP-PPL-CAT
n27_a_paulfellows__1->n27_a_paulfellows__1_4
n27_a_paulfellows__1_5
PUNC
n27_a_paulfellows__1->n27_a_paulfellows__1_5
n27_a_paulfellows__1_6
PRN
n27_a_paulfellows__1->n27_a_paulfellows__1_6
n27_a_paulfellows__1_7
PUNC
n27_a_paulfellows__1->n27_a_paulfellows__1_7
n27_a_paulfellows__1_1_1
ADV
n27_a_paulfellows__1_1->n27_a_paulfellows__1_1_1
n27_a_paulfellows__1_1_1->n27_a_paulfellows__1_1_1_1
n27_a_paulfellows__1_2_1
D;_nphd_
n27_a_paulfellows__1_2->n27_a_paulfellows__1_2_1
n27_a_paulfellows__1_2_1->n27_a_paulfellows__1_2_1_1
n27_a_paulfellows__1_3->n27_a_paulfellows__1_3_1
n27_a_paulfellows__1_4_1
NP-LGS
n27_a_paulfellows__1_4->n27_a_paulfellows__1_4_1
n27_a_paulfellows__1_4_2
VVN;_Tn.pr_
n27_a_paulfellows__1_4->n27_a_paulfellows__1_4_2
n27_a_paulfellows__1_4_3
PP-CLR
n27_a_paulfellows__1_4->n27_a_paulfellows__1_4_3
n27_a_paulfellows__1_4_1->n27_a_paulfellows__1_4_1_1
n27_a_paulfellows__1_4_2->n27_a_paulfellows__1_4_2_1
n27_a_paulfellows__1_4_3_1
P-ROLE
n27_a_paulfellows__1_4_3->n27_a_paulfellows__1_4_3_1
n27_a_paulfellows__1_4_3_2
PUNC
n27_a_paulfellows__1_4_3->n27_a_paulfellows__1_4_3_2
n27_a_paulfellows__1_4_3_3
NP
n27_a_paulfellows__1_4_3->n27_a_paulfellows__1_4_3_3
n27_a_paulfellows__1_4_3_1->n27_a_paulfellows__1_4_3_1_1
n27_a_paulfellows__1_4_3_2->n27_a_paulfellows__1_4_3_2_1
n27_a_paulfellows__1_4_3_3_1
PP
n27_a_paulfellows__1_4_3_3->n27_a_paulfellows__1_4_3_3_1
n27_a_paulfellows__1_4_3_3_2
PUNC
n27_a_paulfellows__1_4_3_3->n27_a_paulfellows__1_4_3_3_2
n27_a_paulfellows__1_4_3_3_3
D
n27_a_paulfellows__1_4_3_3->n27_a_paulfellows__1_4_3_3_3
n27_a_paulfellows__1_4_3_3_4
NPR
n27_a_paulfellows__1_4_3_3->n27_a_paulfellows__1_4_3_3_4
n27_a_paulfellows__1_4_3_3_5
NPR
n27_a_paulfellows__1_4_3_3->n27_a_paulfellows__1_4_3_3_5
n27_a_paulfellows__1_4_3_3_1_1
P-ROLE
n27_a_paulfellows__1_4_3_3_1->n27_a_paulfellows__1_4_3_3_1_1
n27_a_paulfellows__1_4_3_3_1_2
NP
n27_a_paulfellows__1_4_3_3_1->n27_a_paulfellows__1_4_3_3_1_2
n27_a_paulfellows__1_4_3_3_1_1->n27_a_paulfellows__1_4_3_3_1_1_1
n27_a_paulfellows__1_4_3_3_1_2_1
D
n27_a_paulfellows__1_4_3_3_1_2->n27_a_paulfellows__1_4_3_3_1_2_1
n27_a_paulfellows__1_4_3_3_1_2_2
N
n27_a_paulfellows__1_4_3_3_1_2->n27_a_paulfellows__1_4_3_3_1_2_2
n27_a_paulfellows__1_4_3_3_1_2_3
N
n27_a_paulfellows__1_4_3_3_1_2->n27_a_paulfellows__1_4_3_3_1_2_3
n27_a_paulfellows__1_4_3_3_1_2_1->n27_a_paulfellows__1_4_3_3_1_2_1_1
n27_a_paulfellows__1_4_3_3_1_2_2->n27_a_paulfellows__1_4_3_3_1_2_2_1
n27_a_paulfellows__1_4_3_3_1_2_3->n27_a_paulfellows__1_4_3_3_1_2_3_1
n27_a_paulfellows__1_4_3_3_2->n27_a_paulfellows__1_4_3_3_2_1
n27_a_paulfellows__1_4_3_3_3->n27_a_paulfellows__1_4_3_3_3_1
n27_a_paulfellows__1_4_3_3_4->n27_a_paulfellows__1_4_3_3_4_1
n27_a_paulfellows__1_4_3_3_5->n27_a_paulfellows__1_4_3_3_5_1
n27_a_paulfellows__1_5->n27_a_paulfellows__1_5_1
n27_a_paulfellows__1_6_1
IP-MAT
n27_a_paulfellows__1_6->n27_a_paulfellows__1_6_1
n27_a_paulfellows__1_6_1_1
ADVP-NIM
n27_a_paulfellows__1_6_1->n27_a_paulfellows__1_6_1_1
n27_a_paulfellows__1_6_1_2
NP-SBJ
n27_a_paulfellows__1_6_1->n27_a_paulfellows__1_6_1_2
n27_a_paulfellows__1_6_1_3
BED;_Ln_
n27_a_paulfellows__1_6_1->n27_a_paulfellows__1_6_1_3
n27_a_paulfellows__1_6_1_4
NP-PRD
n27_a_paulfellows__1_6_1->n27_a_paulfellows__1_6_1_4
n27_a_paulfellows__1_6_1_1_1
ADV
n27_a_paulfellows__1_6_1_1->n27_a_paulfellows__1_6_1_1_1
n27_a_paulfellows__1_6_1_1_1->n27_a_paulfellows__1_6_1_1_1_1
n27_a_paulfellows__1_6_1_2_1
PRO
n27_a_paulfellows__1_6_1_2->n27_a_paulfellows__1_6_1_2_1
n27_a_paulfellows__1_6_1_2_1->n27_a_paulfellows__1_6_1_2_1_1
n27_a_paulfellows__1_6_1_3->n27_a_paulfellows__1_6_1_3_1
n27_a_paulfellows__1_6_1_4_1
D
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_1
n27_a_paulfellows__1_6_1_4_2
ADJP
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_2
n27_a_paulfellows__1_6_1_4_3
ADJP
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_3
n27_a_paulfellows__1_6_1_4_4
N
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_4
n27_a_paulfellows__1_6_1_4_5
PULB
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_5
n27_a_paulfellows__1_6_1_4_6
IP-PPL
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_6
n27_a_paulfellows__1_6_1_4_7
PURB
n27_a_paulfellows__1_6_1_4->n27_a_paulfellows__1_6_1_4_7
n27_a_paulfellows__1_6_1_4_1->n27_a_paulfellows__1_6_1_4_1_1
n27_a_paulfellows__1_6_1_4_2_1
ADJ
n27_a_paulfellows__1_6_1_4_2->n27_a_paulfellows__1_6_1_4_2_1
n27_a_paulfellows__1_6_1_4_2_1->n27_a_paulfellows__1_6_1_4_2_1_1
n27_a_paulfellows__1_6_1_4_3_1
ADJ
n27_a_paulfellows__1_6_1_4_3->n27_a_paulfellows__1_6_1_4_3_1
n27_a_paulfellows__1_6_1_4_3_1->n27_a_paulfellows__1_6_1_4_3_1_1
n27_a_paulfellows__1_6_1_4_4->n27_a_paulfellows__1_6_1_4_4_1
n27_a_paulfellows__1_6_1_4_5->n27_a_paulfellows__1_6_1_4_5_1
n27_a_paulfellows__1_6_1_4_6_1
NP-PRD
n27_a_paulfellows__1_6_1_4_6->n27_a_paulfellows__1_6_1_4_6_1
n27_a_paulfellows__1_6_1_4_6_1_1
PP-SCON
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_1
n27_a_paulfellows__1_6_1_4_6_1_2
PULQ
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_2
n27_a_paulfellows__1_6_1_4_6_1_3
NPR
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_3
n27_a_paulfellows__1_6_1_4_6_1_4
ADJP
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_4
n27_a_paulfellows__1_6_1_4_6_1_5
N
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_5
n27_a_paulfellows__1_6_1_4_6_1_6
PURQ
n27_a_paulfellows__1_6_1_4_6_1->n27_a_paulfellows__1_6_1_4_6_1_6
n27_a_paulfellows__1_6_1_4_6_1_1_1
P-CONN
n27_a_paulfellows__1_6_1_4_6_1_1->n27_a_paulfellows__1_6_1_4_6_1_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2
IP-ADV
n27_a_paulfellows__1_6_1_4_6_1_1->n27_a_paulfellows__1_6_1_4_6_1_1_2
n27_a_paulfellows__1_6_1_4_6_1_1_1->n27_a_paulfellows__1_6_1_4_6_1_1_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_1
NP-SBJ
n27_a_paulfellows__1_6_1_4_6_1_1_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_2
VBP;__
n27_a_paulfellows__1_6_1_4_6_1_1_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_2
n27_a_paulfellows__1_6_1_4_6_1_1_2_3
PP-NIM
n27_a_paulfellows__1_6_1_4_6_1_1_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_3
n27_a_paulfellows__1_6_1_4_6_1_1_2_1_1
PRO
n27_a_paulfellows__1_6_1_4_6_1_1_2_1->n27_a_paulfellows__1_6_1_4_6_1_1_2_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_1_1->n27_a_paulfellows__1_6_1_4_6_1_1_2_1_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_2_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_1
P-ROLE
n27_a_paulfellows__1_6_1_4_6_1_1_2_3->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2
NP
n27_a_paulfellows__1_6_1_4_6_1_1_2_3->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_1->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_1
D
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_2
N
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_2
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_1->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_1_1
n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_2->n27_a_paulfellows__1_6_1_4_6_1_1_2_3_2_2_1
n27_a_paulfellows__1_6_1_4_6_1_2->n27_a_paulfellows__1_6_1_4_6_1_2_1
n27_a_paulfellows__1_6_1_4_6_1_3->n27_a_paulfellows__1_6_1_4_6_1_3_1
n27_a_paulfellows__1_6_1_4_6_1_4_1
ADJ
n27_a_paulfellows__1_6_1_4_6_1_4->n27_a_paulfellows__1_6_1_4_6_1_4_1
n27_a_paulfellows__1_6_1_4_6_1_4_1->n27_a_paulfellows__1_6_1_4_6_1_4_1_1
n27_a_paulfellows__1_6_1_4_6_1_5->n27_a_paulfellows__1_6_1_4_6_1_5_1
n27_a_paulfellows__1_6_1_4_6_1_6->n27_a_paulfellows__1_6_1_4_6_1_6_1
n27_a_paulfellows__1_6_1_4_7->n27_a_paulfellows__1_6_1_4_7_1
n27_a_paulfellows__1_7->n27_a_paulfellows__1_7_1
( (IP-MAT (ADVP-NIM (ADV So;{so}))
(NP-SBJ;{DEV_BOARD} (D;_nphd_ this;{this}))
(BED;_cat_VePASS_ was;{be})
(IP-PPL-CAT (NP-LGS *)
(VVN;_Tn.pr_ plugged;{plug[into]})
(PP-CLR (P-ROLE into;{into})
(PUNC ,)
(NP (PP (P-ROLE via;{via})
(NP (D a;{a})
(N tube;{tube})
(N interface;{interface})))
(PUNC ,)
(D a;{a})
(NPR BBC;{BBC})
(NPR Micro;{Micro}))))
(PUNC ,)
(PRN (IP-MAT (ADVP-NIM (ADV so;{so}))
(NP-SBJ;{DEV_BOARD} (PRO it;{it}))
(BED;_Ln_ was;{be})
(NP-PRD (D a;{a})
(ADJP (ADJ giant;{giant}))
(ADJP (ADJ second;{second}))
(N processor;{processor})
(PULB -LRB-)
(IP-PPL (NP-PRD (PP-SCON (P-CONN as;{as})
(IP-ADV (NP-SBJ (PRO it;{it}))
(VBP;__ says;{say})
(PP-NIM (P-ROLE on;{on})
(NP (D the;{the})
(N board;{board})))))
(PULQ <ldquo>)
(NPR A500;{A500})
(ADJP (ADJ second;{second}))
(N processor;{processor})
(PURQ <rdquo>)))
(PURB -RRB-))))
(PUNC .))
(ID 27_a_paulfellows))