46_a_paulfellows
We spent ages trying to create some code on the ARM end make it reliably boot up and start the keyboard properly.

n46_a_paulfellows n46_a_paulfellows__1_1_1_1 We n46_a_paulfellows__1_2_1 spent n46_a_paulfellows__1_3_1_1 ages n46_a_paulfellows__1_4_1_1_1 trying n46_a_paulfellows__1_4_1_2_1_1 to n46_a_paulfellows__1_4_1_2_2_1_1_1 create n46_a_paulfellows__1_4_1_2_2_1_2_1_1 some n46_a_paulfellows__1_4_1_2_2_1_2_2_1 code n46_a_paulfellows__1_4_1_2_2_1_3_1_1 on n46_a_paulfellows__1_4_1_2_2_1_3_2_1_1 the n46_a_paulfellows__1_4_1_2_2_1_3_2_2_1 ARM n46_a_paulfellows__1_4_1_2_2_1_3_2_3_1 end n46_a_paulfellows__1_4_1_2_2_2_1_1_1 make n46_a_paulfellows__1_4_1_2_2_2_1_2_1_1 it n46_a_paulfellows__1_4_1_2_2_2_1_3_1_1_1 reliably n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_1_1 boot n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_2_1 up n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_1_1 and n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_1_1 start n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_1_1 the n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_2_1 keyboard n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3_1_1 properly n46_a_paulfellows__1_5_1 . n46_a_paulfellows__1 IP-MAT n46_a_paulfellows__1_1 NP-SBJ n46_a_paulfellows__1->n46_a_paulfellows__1_1 n46_a_paulfellows__1_2 VBD;_Tn_ n46_a_paulfellows__1->n46_a_paulfellows__1_2 n46_a_paulfellows__1_3 NP-OB1 n46_a_paulfellows__1->n46_a_paulfellows__1_3 n46_a_paulfellows__1_4 PP-SCON n46_a_paulfellows__1->n46_a_paulfellows__1_4 n46_a_paulfellows__1_5 PUNC n46_a_paulfellows__1->n46_a_paulfellows__1_5 n46_a_paulfellows__1_1_1 PRO n46_a_paulfellows__1_1->n46_a_paulfellows__1_1_1 n46_a_paulfellows__1_1_1->n46_a_paulfellows__1_1_1_1 n46_a_paulfellows__1_2->n46_a_paulfellows__1_2_1 n46_a_paulfellows__1_3_1 NS n46_a_paulfellows__1_3->n46_a_paulfellows__1_3_1 n46_a_paulfellows__1_3_1->n46_a_paulfellows__1_3_1_1 n46_a_paulfellows__1_4_1 IP-PPL2 n46_a_paulfellows__1_4->n46_a_paulfellows__1_4_1 n46_a_paulfellows__1_4_1_1 VAG;_It_ n46_a_paulfellows__1_4_1->n46_a_paulfellows__1_4_1_1 n46_a_paulfellows__1_4_1_2 IP-INF-CLR n46_a_paulfellows__1_4_1->n46_a_paulfellows__1_4_1_2 n46_a_paulfellows__1_4_1_1->n46_a_paulfellows__1_4_1_1_1 n46_a_paulfellows__1_4_1_2_1 TO n46_a_paulfellows__1_4_1_2->n46_a_paulfellows__1_4_1_2_1 n46_a_paulfellows__1_4_1_2_2 ILYR n46_a_paulfellows__1_4_1_2->n46_a_paulfellows__1_4_1_2_2 n46_a_paulfellows__1_4_1_2_1->n46_a_paulfellows__1_4_1_2_1_1 n46_a_paulfellows__1_4_1_2_2_1 ILYR n46_a_paulfellows__1_4_1_2_2->n46_a_paulfellows__1_4_1_2_2_1 n46_a_paulfellows__1_4_1_2_2_2 CONJP n46_a_paulfellows__1_4_1_2_2->n46_a_paulfellows__1_4_1_2_2_2 n46_a_paulfellows__1_4_1_2_2_1_1 VB;_Tn_ n46_a_paulfellows__1_4_1_2_2_1->n46_a_paulfellows__1_4_1_2_2_1_1 n46_a_paulfellows__1_4_1_2_2_1_2 NP-OB1 n46_a_paulfellows__1_4_1_2_2_1->n46_a_paulfellows__1_4_1_2_2_1_2 n46_a_paulfellows__1_4_1_2_2_1_3 PP-NIM n46_a_paulfellows__1_4_1_2_2_1->n46_a_paulfellows__1_4_1_2_2_1_3 n46_a_paulfellows__1_4_1_2_2_1_1->n46_a_paulfellows__1_4_1_2_2_1_1_1 n46_a_paulfellows__1_4_1_2_2_1_2_1 D n46_a_paulfellows__1_4_1_2_2_1_2->n46_a_paulfellows__1_4_1_2_2_1_2_1 n46_a_paulfellows__1_4_1_2_2_1_2_2 N n46_a_paulfellows__1_4_1_2_2_1_2->n46_a_paulfellows__1_4_1_2_2_1_2_2 n46_a_paulfellows__1_4_1_2_2_1_2_1->n46_a_paulfellows__1_4_1_2_2_1_2_1_1 n46_a_paulfellows__1_4_1_2_2_1_2_2->n46_a_paulfellows__1_4_1_2_2_1_2_2_1 n46_a_paulfellows__1_4_1_2_2_1_3_1 P-ROLE n46_a_paulfellows__1_4_1_2_2_1_3->n46_a_paulfellows__1_4_1_2_2_1_3_1 n46_a_paulfellows__1_4_1_2_2_1_3_2 NP n46_a_paulfellows__1_4_1_2_2_1_3->n46_a_paulfellows__1_4_1_2_2_1_3_2 n46_a_paulfellows__1_4_1_2_2_1_3_1->n46_a_paulfellows__1_4_1_2_2_1_3_1_1 n46_a_paulfellows__1_4_1_2_2_1_3_2_1 D n46_a_paulfellows__1_4_1_2_2_1_3_2->n46_a_paulfellows__1_4_1_2_2_1_3_2_1 n46_a_paulfellows__1_4_1_2_2_1_3_2_2 NPR n46_a_paulfellows__1_4_1_2_2_1_3_2->n46_a_paulfellows__1_4_1_2_2_1_3_2_2 n46_a_paulfellows__1_4_1_2_2_1_3_2_3 N n46_a_paulfellows__1_4_1_2_2_1_3_2->n46_a_paulfellows__1_4_1_2_2_1_3_2_3 n46_a_paulfellows__1_4_1_2_2_1_3_2_1->n46_a_paulfellows__1_4_1_2_2_1_3_2_1_1 n46_a_paulfellows__1_4_1_2_2_1_3_2_2->n46_a_paulfellows__1_4_1_2_2_1_3_2_2_1 n46_a_paulfellows__1_4_1_2_2_1_3_2_3->n46_a_paulfellows__1_4_1_2_2_1_3_2_3_1 n46_a_paulfellows__1_4_1_2_2_2_1 ILYR n46_a_paulfellows__1_4_1_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_1 VB;_Cn.a_ n46_a_paulfellows__1_4_1_2_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_2 NP-OB1 n46_a_paulfellows__1_4_1_2_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_2 n46_a_paulfellows__1_4_1_2_2_2_1_3 IP-INF-PRD n46_a_paulfellows__1_4_1_2_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3 n46_a_paulfellows__1_4_1_2_2_2_1_1->n46_a_paulfellows__1_4_1_2_2_2_1_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_2_1 PRO n46_a_paulfellows__1_4_1_2_2_2_1_2->n46_a_paulfellows__1_4_1_2_2_2_1_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_1 ADVP-NIM n46_a_paulfellows__1_4_1_2_2_2_1_3->n46_a_paulfellows__1_4_1_2_2_2_1_3_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2 ILYR n46_a_paulfellows__1_4_1_2_2_2_1_3->n46_a_paulfellows__1_4_1_2_2_2_1_3_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_1_1 ADV n46_a_paulfellows__1_4_1_2_2_2_1_3_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_1_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_1_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1 ILYR n46_a_paulfellows__1_4_1_2_2_2_1_3_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2 CONJP n46_a_paulfellows__1_4_1_2_2_2_1_3_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_1 VB;_phr_Vp_ n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_2 RP n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_1_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_1 CONJ n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2 ILYR n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_1 VB;_Tn_ n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2 NP-OB1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3 ADVP-NIM n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_1 D n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_2 N n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_2 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_1_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_2->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_2_2_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3_1 ADV n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3_1 n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3_1->n46_a_paulfellows__1_4_1_2_2_2_1_3_2_2_2_3_1_1 n46_a_paulfellows__1_5->n46_a_paulfellows__1_5_1
( (IP-MAT (NP-SBJ (PRO We;{we}))
          (VBD;_Tn_ spent;{spend})
          (NP-OB1 (NS ages;{age}))
          (PP-SCON (IP-PPL2 (VAG;_It_ trying;{try})
                            (IP-INF-CLR (TO to;{to})
                                        (ILYR (ILYR (VB;_Tn_ create;{create})
                                                    (NP-OB1 (D some;{some})
                                                            (N code;{code}))
                                                    (PP-NIM (P-ROLE on;{on})
                                                            (NP (D the;{the})
                                                                (NPR ARM;{ARM})
                                                                (N end;{end}))))
                                              (CONJP (ILYR (VB;_Cn.a_ make;{make})
                                                           (NP-OB1 (PRO it;{it}))
                                                           (IP-INF-PRD (ADVP-NIM (ADV reliably;{reliably}))
                                                                       (ILYR (ILYR (VB;_phr_Vp_ boot;{boot})
                                                                                   (RP up;{up}))
                                                                             (CONJP (CONJ and;{and})
                                                                                    (ILYR (VB;_Tn_ start;{start})
                                                                                          (NP-OB1 (D the;{the})
                                                                                                  (N keyboard;{keyboard}))
                                                                                          (ADVP-NIM (ADV properly;{properly}))))))))))))
          (PUNC .))
  (ID 46_a_paulfellows))



%3 z_0046_5005 r_0046_0013__make make z_0046_5005->r_0046_0013__make [conj2] r_0046_0006__create create z_0046_5005->r_0046_0006__create [conj1] r_0046_0018__and and r_0046_0013__make->r_0046_0018__and [prd] r_0046_0014__it it r_0046_0013__make->r_0046_0014__it [arg1] r_0046_0001__We We r_0046_0013__make->r_0046_0001__We [arg0] r_0046_0006__create->r_0046_0001__We [arg0] r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end the ARM end r_0046_0006__create->r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end on [nim] r_0046_0007__some_r_0046_0008__code some code r_0046_0006__create->r_0046_0007__some_r_0046_0008__code [arg1] z_0046_5002 r_0046_0004__trying trying z_0046_5002->r_0046_0004__trying [restriction] r_0046_0002__spent spent z_0046_5002->r_0046_0002__spent [scope] r_0046_0004__trying->z_0046_5005 [clr] r_0046_0004__trying->r_0046_0001__We [arg0] r_0046_0002__spent->r_0046_0001__We [arg0] r_0046_0003__ages ages r_0046_0002__spent->r_0046_0003__ages [arg1] r_0046_0019__start start z_0046_5011 r_0046_0019__start->z_0046_5011 [arg0] r_0046_0022__properly properly r_0046_0019__start->r_0046_0022__properly [nim] r_0046_0020__the_r_0046_0021__keyboard the keyboard r_0046_0019__start->r_0046_0020__the_r_0046_0021__keyboard [arg1] r_0046_0015__reliably reliably r_0046_0019__start->r_0046_0015__reliably [nim] r_0046_0018__and->r_0046_0019__start [conj2] r_0046_0016__boot_r_0046_0017__up boot up r_0046_0018__and->r_0046_0016__boot_r_0046_0017__up [conj1] r_0046_0016__boot_r_0046_0017__up->z_0046_5011 [arg0] r_0046_0016__boot_r_0046_0017__up->r_0046_0015__reliably [nim]
arc(r_0046_0002__spent,r_0046_0001__We,arg0).
arc(r_0046_0002__spent,r_0046_0003__ages,arg1).
arc(r_0046_0004__trying,r_0046_0001__We,arg0).
arc(r_0046_0004__trying,z_0046_5005,clr).
arc(r_0046_0006__create,r_0046_0001__We,arg0).
arc(r_0046_0006__create,r_0046_0007__some_r_0046_0008__code,arg1).
arc(r_0046_0006__create,r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end,r_0046_0009__on__nim).
arc(r_0046_0013__make,r_0046_0001__We,arg0).
arc(r_0046_0013__make,r_0046_0014__it,arg1).
arc(r_0046_0013__make,r_0046_0018__and,prd).
arc(r_0046_0016__boot_r_0046_0017__up,r_0046_0015__reliably,nim).
arc(r_0046_0016__boot_r_0046_0017__up,z_0046_5011,arg0).
arc(r_0046_0018__and,r_0046_0016__boot_r_0046_0017__up,conj1).
arc(r_0046_0018__and,r_0046_0019__start,conj2).
arc(r_0046_0019__start,r_0046_0015__reliably,nim).
arc(r_0046_0019__start,r_0046_0020__the_r_0046_0021__keyboard,arg1).
arc(r_0046_0019__start,r_0046_0022__properly,nim).
arc(r_0046_0019__start,z_0046_5011,arg0).
arc(z_0046_5002,r_0046_0002__spent,scope).
arc(z_0046_5002,r_0046_0004__trying,restriction).
arc(z_0046_5005,r_0046_0006__create,conj1).
arc(z_0046_5005,r_0046_0013__make,conj2).



%3 r_0046_0002__spent spent r_0046_0001__We We r_0046_0002__spent->r_0046_0001__We [arg0] r_0046_0003__ages ages r_0046_0002__spent->r_0046_0003__ages [arg1] r_0046_0004__trying trying r_0046_0004__trying->r_0046_0001__We [arg0] z_0046_5005 r_0046_0004__trying->z_0046_5005 [clr] r_0046_0006__create create z_0046_5005->r_0046_0006__create [conj1] r_0046_0013__make make z_0046_5005->r_0046_0013__make [conj2] r_0046_0006__create->r_0046_0001__We [arg0] r_0046_0007__some_r_0046_0008__code some code r_0046_0006__create->r_0046_0007__some_r_0046_0008__code [arg1] r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end the ARM end r_0046_0006__create->r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end on [nim] r_0046_0013__make->r_0046_0001__We [arg0] r_0046_0014__it it r_0046_0013__make->r_0046_0014__it [arg1] r_0046_0018__and and r_0046_0013__make->r_0046_0018__and [prd] r_0046_0016__boot_r_0046_0017__up boot up r_0046_0018__and->r_0046_0016__boot_r_0046_0017__up [conj1] r_0046_0019__start start r_0046_0018__and->r_0046_0019__start [conj2] r_0046_0015__reliably reliably r_0046_0016__boot_r_0046_0017__up->r_0046_0015__reliably [nim] z_0046_5011 r_0046_0016__boot_r_0046_0017__up->z_0046_5011 [arg0] r_0046_0019__start->r_0046_0015__reliably [nim] r_0046_0019__start->z_0046_5011 [arg0] r_0046_0020__the_r_0046_0021__keyboard the keyboard r_0046_0019__start->r_0046_0020__the_r_0046_0021__keyboard [arg1] r_0046_0022__properly properly r_0046_0019__start->r_0046_0022__properly [nim] z_0046_5002 z_0046_5002->r_0046_0002__spent [conj2] z_0046_5002->r_0046_0004__trying [conj1]
fof(formula,axiom,
    ? [R_0046_0001__WE,R_0046_0003__AGES,R_0046_0002__SPENT,R_0046_0007__SOME_R_0046_0008__CODE,R_0046_0010__THE_R_0046_0011__ARM_R_0046_0012__END,R_0046_0006__CREATE,R_0046_0014__IT,R_0046_0015__RELIABLY,Z_0046_5011,R_0046_0016__BOOT_R_0046_0017__UP,R_0046_0020__THE_R_0046_0021__KEYBOARD,R_0046_0022__PROPERLY,R_0046_0019__START,R_0046_0018__AND,R_0046_0013__MAKE,Z_0046_5005,R_0046_0004__TRYING,Z_0046_5002] :
      ( r_0046_0001__We(R_0046_0001__WE)
      & r_0046_0003__ages(R_0046_0003__AGES)
      & r_0046_0007__some_r_0046_0008__code(R_0046_0007__SOME_R_0046_0008__CODE)
      & r_0046_0010__the_r_0046_0011__ARM_r_0046_0012__end(R_0046_0010__THE_R_0046_0011__ARM_R_0046_0012__END)
      & r_0046_0014__it(R_0046_0014__IT)
      & r_0046_0015__reliably(R_0046_0015__RELIABLY)
      & r_0046_0020__the_r_0046_0021__keyboard(R_0046_0020__THE_R_0046_0021__KEYBOARD)
      & r_0046_0022__properly(R_0046_0022__PROPERLY)
      & z_0046_5011(Z_0046_5011)
      & z_0046_5002(Z_0046_5002)
      & has_conj1(Z_0046_5002,R_0046_0004__TRYING)
      & r_0046_0004__trying(R_0046_0004__TRYING)
      & has_clr(R_0046_0004__TRYING,Z_0046_5005)
      & z_0046_5005(Z_0046_5005)
      & has_conj2(Z_0046_5005,R_0046_0013__MAKE)
      & r_0046_0013__make(R_0046_0013__MAKE)
      & has_prd(R_0046_0013__MAKE,R_0046_0018__AND)
      & r_0046_0018__and(R_0046_0018__AND)
      & has_conj2(R_0046_0018__AND,R_0046_0019__START)
      & r_0046_0019__start(R_0046_0019__START)
      & has_arg0(R_0046_0019__START,Z_0046_5011)
      & has_nim(R_0046_0019__START,R_0046_0022__PROPERLY)
      & has_arg1(R_0046_0019__START,R_0046_0020__THE_R_0046_0021__KEYBOARD)
      & has_nim(R_0046_0019__START,R_0046_0015__RELIABLY)
      & has_conj1(R_0046_0018__AND,R_0046_0016__BOOT_R_0046_0017__UP)
      & r_0046_0016__boot_r_0046_0017__up(R_0046_0016__BOOT_R_0046_0017__UP)
      & has_arg0(R_0046_0016__BOOT_R_0046_0017__UP,Z_0046_5011)
      & has_nim(R_0046_0016__BOOT_R_0046_0017__UP,R_0046_0015__RELIABLY)
      & has_arg1(R_0046_0013__MAKE,R_0046_0014__IT)
      & has_arg0(R_0046_0013__MAKE,R_0046_0001__WE)
      & has_conj1(Z_0046_5005,R_0046_0006__CREATE)
      & r_0046_0006__create(R_0046_0006__CREATE)
      & has_r_0046_0009__on__nim(R_0046_0006__CREATE,R_0046_0010__THE_R_0046_0011__ARM_R_0046_0012__END)
      & has_arg1(R_0046_0006__CREATE,R_0046_0007__SOME_R_0046_0008__CODE)
      & has_arg0(R_0046_0006__CREATE,R_0046_0001__WE)
      & has_arg0(R_0046_0004__TRYING,R_0046_0001__WE)
      & has_conj2(Z_0046_5002,R_0046_0002__SPENT)
      & r_0046_0002__spent(R_0046_0002__SPENT)
      & has_arg1(R_0046_0002__SPENT,R_0046_0003__AGES)
      & has_arg0(R_0046_0002__SPENT,R_0046_0001__WE) ) ).